[SC]SystemC在CPU/GPU验证中的应用(五)
SystemC在CPU/GPU验证中的应用(五)
摘要:下面分享50个逐步升级SystemC编程能力的示例及建议的学习路线图。您可以一次一批地完成它们——从前五个基础的例子开始,然后转向channels, TLM, bus models, simple CPU/GPU kernels等等。在每个阶段掌握之后,再进行下一组的学习。
50个代表性的SystemC例子
- Hello, SystemC! (module + sc_main)
- Simple clock generator
- 4-bit up/down counter
- Blocking FIFO channel
- Non-blocking handshake channel
- Combinational AND/OR modules
- D-flip‐flop with async reset
- 8×1 multiplexer
- Simple RAM model (blocking accesses)
- Simple ROM model
- Dual-port RAM
- Bus arbiter (round-robin)
- TLM2.0 blocking transport (initiator)
- TLM2.0 blocking transport (target)
- TLM2.0 non-blocking transport
- TLM2.0 analysis port / export
- Simple AXI-Lite bus model
- AXI-Lite master + slave example
- Quantum keeper & time annotation
- tlm_utils::simple_initiator_socket
- tlm_utils::simple_target_socket
- Hierarchical module instantiation
- Dynamic process spawn & kill
- Event notification & sc_event_queue
- Reset synchronization circuit
- Clock domain crossing FIFO
- Bus monitor / tracer (TLM analysis)
- Memory-mapped register file
- Interrupt controller model
- Pipeline stage model (fetch/decode/execute)
- Simple 4-stage CPU datapath
- Cache model (direct-mapped)
- DMA engine model
- GPGPU kernel launcher skeleton
- GPU shader core (vector add)
- Barrier synchronization (sc_barrier emulation)
- Producer-consumer with sc_mutex
- sc_semaphore example
- SystemC-AMS basic RC filter
- Fixed-point arithmetic with sc_fixed
- Power‐aware sc_trace (VCD generation)
- Cross-trade-off analysis (timing vs. power)
- SystemC assertions (SC_ASSERT)
- UVM-SystemC basic use case
- Co-simulation stub (Verilog DPI)
- SystemC Python binding stub
- Parameterized module (SC_MODULE_T)
- TLM-2.0 generic payload extensions
- Simple NoC router model
- Full mini‐SOC: CPU + L2 cache + memory + interconnect
Fifth Batch: Examples 31–40
Below are the first five examples with complete code + detailed comments.
31. 简易 4 阶段 CPU 流水线: Fetch→Decode→Execute→Writeback
文件名:pipeline_4stage.cpp
#include <systemc.h>
#include <tuple>
#include <vector>// 指令格式:<opcode, operand>
using Instr = std::pair<int,int>;
// 解码结果:<opcode, operand>
using Decoded = std::tuple<int,int>;
// 执行结果:<dest_reg, value>
using Result = std::tuple<int,int>;// Fetch 阶段:从指令存储读 Instr
SC_MODULE(Fetch) {sc_in<bool> clk;sc_fifo_out<Instr> out;std::vector<Instr> imem;int pc{0};SC_CTOR(Fetch) {// 初始化几条“指令”imem = {{0,5},{1,3},{0,2},{1,4},{2,0}};SC_METHOD(proc);sensitive << clk.pos();}void proc() {if (pc < (int)imem.size()) {Instr ins = imem[pc++];out.write(ins);cout<<sc_time_stamp()<<" [Fetch] pc="<<(pc-1)<<" instr=("<<ins.first<<","<<ins.second<<")\n";}}
};// Decode 阶段:把 Instr 转成 Decoded
SC_MODULE(Decode) {sc_in<bool> clk;sc_fifo_in<Instr> in;sc_fifo_out<Decoded> out;SC_CTOR(Decode) {SC_METHOD(proc);sensitive << clk.pos();}void proc() {Instr ins;if (in.nb_read(ins)) {Decoded d = std::make_tuple(ins.first, ins.second);out.write(d);cout<<sc_time_stamp()<<" [Decode] opcode="<<ins.first<<" operand="<<ins.second<<"\n";}}
};// Execute 阶段:
// opcode 0→加1,1→乘2,2→写入寄存器 operand=寄存器号
SC_MODULE(Execute) {sc_in<bool> clk;sc_fifo_in<Decoded> in;sc_fifo_out<Result> out;SC_CTOR(Execute) {SC_METHOD(proc);sensitive << clk.pos();}void proc() {Decoded d;if (in.nb_read(d)) {int op, val;std::tie(op,val) = d;int res = (op==0)? val+1 : (op==1)? val*2 : v