| 作者: Taro Fujii; Takao Toi; Teruhito Tanaka; Katsumi Togawa; Toshiro Kitaoka; Kengo Nishino; Noritsugu Nakamura; Hiroki Nakahara; Masato Motomura; |
| 期刊: （发表日期: 6/2018） |
| 期刊分区: |
| 本地链接: Fujii 等 - 2018 - New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applicat.pdf |
| DOI: 10.1109/VLSIC.2018.8502438 |
| 摘要: We have developed 3rd generation DRP, dynamically reconfigurable processor, for accelerating deep neural networks (DNNs) in embedded micro-processor systems. A DRP unit (supporting 16b FP from this generation) and a newly designed multiply-and-accumulate (MAC) unit are tightly integrated into an STP-3 AI core to achieve high versatility, high performance, and low latency DNN processing. The co |
