always@(posedge clk or negedge rst_n) begin if (rst_n == 1'b0) cnt_250ms <= 24'd0; else if (cnt_250ms == TIME_250ms - 1) cnt_250ms <= 24'd0; else cnt_250ms <= cnt_250ms + 24'd1; end always@(posedge clk or negedge rst_n) begin if (rst_n == 1'b0) led <= 8'b0000; else if (cnt_250ms ==TIME_250ms - 1) case(led) 8'b0000: led <= 8'b1111; 8'b1111: led <= 8'b0000;
default: led <= 8'b0000; endcase else led <= led; end